The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 04, 2007

Filed:

Dec. 18, 2004
Applicant:

Adam Wright, Saratoga, CA (US);

Inventor:

Adam Wright, Saratoga, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/00 (2006.01); G06F 11/30 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods and structures for protecting programmable logic device ('PLD') programming files are disclosed. In one respect, an embodiment of the present invention includes applying a particular protective setting to a PLD, the setting has a relationship to proper programming of the PLD. A configuration program generates programming data including a non-pre-processed and a pre-processed portion. The pre-processed data reflects the results of processing that is carried out off-device (e.g. by the configuration program on a user computer), but is consistent with the logic of certain on-device processing circuitry. The pre-processing also takes into account information regarding the particular applied setting. The non-pre-processed portion of the programming data is further processed by the certain on-device processing circuitry. The output of the on-device processing circuitry is combined with the pre-processed portion of the programming data in a bit stream for programming the PLD. In another respect, some embodiments utilize a PLD redundancy scheme for implementing programming data protection.


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