The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 28, 2007
Filed:
Jul. 14, 2006
Alexander Kotov, Sunnyvale, CA (US);
Yuniarto Widjaja, San Jose, CA (US);
Tho Ngoc Dang, San Jose, CA (US);
Hung Q. Nguyen, Fremont, CA (US);
Sang Thanh Nguyen, Union City, CA (US);
Alexander Kotov, Sunnyvale, CA (US);
Yuniarto Widjaja, San Jose, CA (US);
Tho Ngoc Dang, San Jose, CA (US);
Hung Q. Nguyen, Fremont, CA (US);
Sang Thanh Nguyen, Union City, CA (US);
Silicon Storage Technology, Inc., Sunnyvale, CA (US);
Abstract
A method to eliminate program deceleration and to enhance the resistance to program disturbance of a non-volatile floating gate memory cell is disclosed. This method eliminates or minimizes the impact of the hole displacement current. This can be done, for example, by increasing the rise time of the high programming voltage applied to the high voltage terminal. Alternatively, the transistor of the non-volatile floating gate memory cell can be turned off until the voltage applied to the high voltage terminal has reached the programming voltage. This can be done, for example by delaying the voltage applied to either the low voltage terminal or to the control gate to turn on the transistor until the voltage at the high voltage terminal has past the ramp up voltage and has reached a level programming voltage.