The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 28, 2007
Filed:
Mar. 21, 2005
Aaron Joseph Caffee, Hillsboro, OR (US);
Christopher Scott Jones, Portland, OR (US);
Robert Beverly Lefferts, Portland, OR (US);
Ross Andrew Segelken, Portland, OR (US);
Jeffrey Lee Sonntag, Portland, OR (US);
Daniel Keith Weinlader, Allentown, PA (US);
Aaron Joseph Caffee, Hillsboro, OR (US);
Christopher Scott Jones, Portland, OR (US);
Robert Beverly Lefferts, Portland, OR (US);
Ross Andrew Segelken, Portland, OR (US);
Jeffrey Lee Sonntag, Portland, OR (US);
Daniel Keith Weinlader, Allentown, PA (US);
Synopsys, Inc., Mountain View, CA (US);
Abstract
A functional block under test (FBUT), comprising mixed-signal or analog circuits, can be tested by a digital test machine (DTM). A DTM sources test vectors to, and expects to receive certain vectors back from, a DUT. The DUT is a single, physically contiguous, IC upon which is integrated the FBUT, a mixed-signal generate and capture unit (MSGC) and a control system. The test vectors can include computer programs for instructing the control system on how to perform mixed-signal or analog-domain tests of the FBUT using resources of the MSGC (such as DACs and ADCs). The test vectors can also include data that effects the operation of a parameterized test procedure, where the test procedure is part of the control system. The control system, in accordance with the test procedure, uses the MSGC to perform mixed-signal or analog-domain tests of the FBUT. The FBUT can include an analog test bus.