The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 14, 2007
Filed:
May. 05, 2006
Applicants:
Naoki Yamada, Sakado, JP;
Hiroshi Sato, Ome, JP;
Tetsuya Tsujikawa, Hamura, JP;
Kazuyuki Miyazawa, Hidaka, JP;
Inventors:
Naoki Yamada, Sakado, JP;
Hiroshi Sato, Ome, JP;
Tetsuya Tsujikawa, Hamura, JP;
Kazuyuki Miyazawa, Hidaka, JP;
Assignee:
Elpida Memory, Inc., Tokyo, JP;
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01);
U.S. Cl.
CPC ...
Abstract
In a nonvolatile semiconductor memory device in which a plurality of threshold values are set to store multi-level data in a memory cell, bits of multi-bit data are separately written into a memory cell according to an address signal or a control signal to effect the reading and erasing. Concretely, the memory array is so constituted that it can be accessed by three-dimensional address of X, Y and Z, and multi-bit data in the memory cell is discriminated by the Z-address.