The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 07, 2007
Filed:
Jul. 22, 2005
Applicants:
Phillip L. Johnson, Hellertown, PA (US);
Gary P. Powell, Upper Macungie, PA (US);
Harold N. Scholz, Allentown, PA (US);
Inventors:
Phillip L. Johnson, Hellertown, PA (US);
Gary P. Powell, Upper Macungie, PA (US);
Harold N. Scholz, Allentown, PA (US);
Assignee:
Lattice Semicondutor Corporation, Hillsboro, OR (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/04 (2006.01);
U.S. Cl.
CPC ...
Abstract
A clock generator has a reset circuit and (at least) two dividers, where each divider divides a reference clock signal by a divisor value to generate an output clock signal. The reset circuit generates reset signals for the dividers, where the reset signals are delayed relative to one another by a selected number of reference clock cycles, such that the dividers generate output clock signals having a desired phase offset between them.