The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 07, 2007
Filed:
Dec. 17, 2004
Chien Liu, Kaohsiung, TW;
Hsueh-te Wang, Kaohsiung, TW;
Meng-jen Wang, Pingtung, TW;
Chi-hao Chiu, Pingtung, TW;
Tai-yuan Huang, Jiading Shiang, TW;
Chien Liu, Kaohsiung, TW;
Hsueh-Te Wang, Kaohsiung, TW;
Meng-Jen Wang, Pingtung, TW;
Chi-Hao Chiu, Pingtung, TW;
Tai-Yuan Huang, Jiading Shiang, TW;
Advanced Semiconductor Engineering, Inc., Kaohsiung, TW;
Abstract
A semiconductor package includes a flip chip mounted on a plurality of leads and encapsulated by a molding compound. The upper surfaces of the leads includes a plurality of bump-bonding regions at the fan-in ends of the leads, and the lower surfaces of the leads include a plurality of outer connecting regions at the fan-out ends of the leads. A plurality of indentations are formed at the upper surfaces of the leads and adjacent to the corresponding bump-bonding regions so as to avoid solder contamination on the leads. After molding, the indentations are filled with the molding compound. Preferably, the indentations have a reversed 'Ω'-shaped profile to prevent bumps of the flip chip from excessively wetting over the other portions of the leads to firmly fix the fan-in ends of the leads.