The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 07, 2007
Filed:
Sep. 21, 2006
Applicants:
Craig T. Salling, Plano, TX (US);
Brian W. Huber, Allen, TX (US);
Inventors:
Craig T. Salling, Plano, TX (US);
Brian W. Huber, Allen, TX (US);
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01);
U.S. Cl.
CPC ...
Abstract
Depletion-mode ferroelectric transistors are adapted for use as non-volatile memory cells for memory devices and electronic systems. Various embodiments are described having a diode interposed between the bit line and a source/drain region of the transistor for added margin against read disturb.
Salling, Craig. (2007). Junction-isolated depletion mode ferroelectric memory devices and systems (U.S. Patent No. 7253464). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7253464
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile