The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 31, 2007

Filed:

Oct. 21, 2004
Applicants:

Rafael Blanco, Essex Junction, VT (US);

Suzanne Granato, Essex Junction, VT (US);

Francis A. Kampf, Jeffersonville, VT (US);

Douglas T. Massey, Essex Junction, VT (US);

Inventors:

Rafael Blanco, Essex Junction, VT (US);

Suzanne Granato, Essex Junction, VT (US);

Francis A. Kampf, Jeffersonville, VT (US);

Douglas T. Massey, Essex Junction, VT (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and system for testing a circuit design. The method including generating a simulation model of the circuit design, the circuit design comprising one or more source latches, one or more destination latches and a logic function connected between the source latches and the destination latches; generating a modified simulation model of the simulation model by inserting random skew between an output of each source latch and an input of the logic function only in asynchronous data paths between the source latches and the destination latches of the simulation model; and running the modified simulation model.


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