The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 31, 2007

Filed:

Apr. 24, 2003
Applicants:

Takahiro Kida, Kosyoku, JP;

Seiichi Miyazaki, Kosyoku, JP;

Kazuhiko Nishimura, Kosyoku, JP;

Nobuyuki Hayashi, Kosyoku, JP;

Katsunori Arai, Kosyoku, JP;

Inventors:

Takahiro Kida, Kosyoku, JP;

Seiichi Miyazaki, Kosyoku, JP;

Kazuhiko Nishimura, Kosyoku, JP;

Nobuyuki Hayashi, Kosyoku, JP;

Katsunori Arai, Kosyoku, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/304 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a method for manufacturing a semiconductor wafer capable of manufacturing a wafer without ring-like sag in an outer peripheral portion thereof when polishing an alkali etched wafer, and a wafer without the ring-like sag in an outer peripheral portion thereof. The present invention comprises: a back surface part polishing and edge polishing step for performing back surface part polishing and edge polishing such that mirror polishing is performed on a chamfered portion and an inner part extending inward from a boundary between the chamfered portion and a back surface of a starting wafer; and a front surface polishing step for mirror polishing a front surface of the wafer subjected to the back surface part polishing and edge polishing step holding the wafer by the back surface thereof.


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