The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 24, 2007
Filed:
Feb. 11, 2004
John B. Halbert, Beaverton, OR (US);
Jim M. Dodd, Shingle Springs, CA (US);
Chung Lam, Redwood City, CA (US);
Randy M. Bonella, Portland, OR (US);
John B. Halbert, Beaverton, OR (US);
Jim M. Dodd, Shingle Springs, CA (US);
Chung Lam, Redwood City, CA (US);
Randy M. Bonella, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Providing electrical isolation between the chipset and the memory data is disclosed. The disclosure includes providing at least one buffer in a memory interface between a chipset and memory modules. Each memory module includes a plurality of memory ranks. The buffers allow the memory interface to be split into first and second sub-interfaces. The first sub-interface is between the chipset and the buffers. The second sub-interface is between the buffers and the memory modules. The method also includes interleaving output of the buffers, and configuring the buffers to properly latch the data being transferred between the chipset and the memory modules. The first and second sub-interfaces operate independently but in synchronization with each other.