The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 17, 2007
Filed:
Nov. 03, 2005
Hyang-ja Yang, Suwon-si, KR;
Ji-suk Kwon, Seoul, KR;
Hwa-jin Kim, Seoul, KR;
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-Do, KR;
Abstract
A circuit wiring layout in a semiconductor memory device comprises first and second p-type MOS transistors having channels connected to each other in series, and first and second n-type MOS transistors having sources connected in parallel to a drain of the second p-type MOS transistor, the p- and n-type MOS transistors forming a decoder NOR gating portion. The first and second n-type MOS transistors having drains connected to first and second main lines, respectively, and sources connected to a section line. The first and second p-type MOS transistors having gates to which select signals for first and second accesses are applied, respectively. The first and second p-type MOS transistors share an active junction with each other in a first area. The first and second n-type MOS transistors are spaced from the first area in a direction of the section line and have independent active junctions.