The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 17, 2007

Filed:

Sep. 16, 2005
Applicants:

Steven A. Vitale, Murphy, TX (US);

Hyesook Hong, Allen, TX (US);

Freidoon Mehrad, Plano, TX (US);

Inventors:

Steven A. Vitale, Murphy, TX (US);

Hyesook Hong, Allen, TX (US);

Freidoon Mehrad, Plano, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/337 (2006.01); H01L 21/336 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 21/469 (2006.01); H01L 21/31 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a method of fabricating a microelectronics device. In one aspect, the method comprises depositing a protective layer () over a spacer material () located over gate electrodes () and a doped region () located between the gate electrodes (), removing a portion of the spacer material () and the protective layer () located over the gate electrodes (). A remaining portion of the spacer material () remains over the top surface of the gate electrodes () and over the doped region (), and a portion of the protective layer () remains over the doped region (). The method further comprises removing the remaining portion of the spacer material () to form spacer sidewalls on the gate electrodes (), expose the top surface of the gate electrodes (), and leave a remnant of the spacer material () over the doped region (). Source/drains are formed adjacent the gate electrodesand through the remnant of the spacer material (), and a metal is incorporated into the gate electrodes ().


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