The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 10, 2007

Filed:

Jan. 27, 2005
Applicants:

Sam Gat-shang Chu, Round Rock, TX (US);

Maureen Anne Delaney, Richmond, VT (US);

Saiful Islam, Austin, TX (US);

Jafar Nahidi, Round Rock, TX (US);

Dung Quoc Nguyen, Austin, TX (US);

Inventors:

Sam Gat-Shang Chu, Round Rock, TX (US);

Maureen Anne Delaney, Richmond, VT (US);

Saiful Islam, Austin, TX (US);

Jafar Nahidi, Round Rock, TX (US);

Dung Quoc Nguyen, Austin, TX (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/34 (2006.01); G06F 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An apparatus and method for speeding up access time of a large register file with wrap capability are provided. With the apparatus and method, the 2:1 multiplexers in conventional register file systems are eliminated from the circuit configuration and instead, additional primary multiplexers are provided for half of the addresses, e.g., the first four sub-arrays of the register file for which the wrap capability is needed. These additional primary multiplexers receive the read address and a shifted read word line signal. The other primary multiplexer receives the read address and an unshifted read word line signal. The outputs from the shifted and non-shifted primary multiplexers are provided to a set of secondary multiplexers which multiplex bits from the outputs of the shifted and non-shifted primary multiplexers to generate the read addresses to be used by the multiple read/write register file system.


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