The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 10, 2007
Filed:
Jan. 31, 2006
Hitesh Suri, San Jose, CA (US);
Gary Woods, Sunnyvale, CA (US);
Hitesh Suri, San Jose, CA (US);
Gary Woods, Sunnyvale, CA (US);
Credence Systems Corporation, Milpitas, CA (US);
Abstract
A method for identifying an area of a chip to be probed proceeds as follows. A callout list of failures is obtained from a tester, the list including cell name and pin for each failure. A Def file is interrogated to locate a Def entry matching the cell name, and a cell type, cell location, and cell orientation data is obtained for the cell from the Def file. A Lef file is then interrogated to locate a Lef entry matching the cell type, and the coordinates of the pin are obtaining from the Lef file. A GDS file is interrogated to locate a GDS entry matching the cell type, and the coordinates of polygons listed in the GDS entry are obtained. The coordinates of the pin are then crossed with the coordinates of the polygons to identify overlapping area. The overlapping area is defined as the location to be probed. A driving signal is applied to a stage to align a prober with the location to be probed.