The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7242559 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 10, 2007

Filed:

Jul. 22, 2004
Applicant:

Chi-di an, Hsin-Chu, TW;

Inventor:

Chi-Di An, Hsin-Chu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H 9/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An I/O circuit is disclosed for tolerating a high voltage input without incurring a leakage current. An ESD current bypass module is coupled between a power supply node and a circuit pad. A high voltage tolerant charge module is used for disabling the ESD current bypass module when the circuit pad receives a high voltage input that is higher than a voltage at the power supply node. In addition, a high voltage tolerant discharge module may be included for alleviating the ESD current bypass module from a voltage overstress when the circuit pad receives a low voltage input that is lower than the voltage at the power supply node.


Find Patent Forward Citations

An, Chi-Di. (2007). High voltage tolerant i/o circuit (U.S. Patent No. 7242559). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7242559

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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