The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 03, 2007

Filed:

Jan. 27, 2006
Applicant:

Koji Shimbayashi, Kasugai, JP;

Inventor:

Koji Shimbayashi, Kasugai, JP;

Assignee:

Spansion LLC, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 8/18 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a single data rate (SDR) mode, logic level transitions of a data condition prior-determination signal RDYO are outputted to an output terminal (O) in response to an internal clock signal CKI. A ready signal RDY is outputted in synchronization with the internal clock signal CKI following a logic level transition of the data condition prior-determination signal RDYO. In a double data rate (DDR) mode, on the other hand, a toggle signal is outputted to the output terminal (O) in correspondence with the internal clock signal CKI following a logical level transition of the data condition prior-determination signal RDYO. After the internal clock signal CKI following the logical level transition of the data condition prior-determination signal RDYO, a strobe signal DQS is outputted in synchronization with the internal clock signal CKI. The ready signal RDY is outputted at the data condition informing terminal (X) in SDR mode while, on the other hand, the strobe signal DQS is outputted at the data condition informing terminal (X) in DDR mode.


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