The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 03, 2007
Filed:
Mar. 03, 2006
Kuo-tung Wang, Hsinchu, TW;
Yen-lee Pan, Hsinchu, TW;
Kuo-hao Chu, Hsinchu County, TW;
Cheng-yuan Hsu, Hsinchu, TW;
Kuo-Tung Wang, Hsinchu, TW;
Yen-Lee Pan, Hsinchu, TW;
Kuo-Hao Chu, Hsinchu County, TW;
Cheng-Yuan Hsu, Hsinchu, TW;
Powerchip Semiconductor Corp., Hsinchu, TW;
Abstract
An erasing method for a non-volatile memory is provided. The method includes the following two major steps. (a) A first voltage is applied to the odd-numbered select gates of each memory row and a second voltage is applied to the even-numbered select gates of each memory row such that the voltage difference between the first voltage and the second voltage is large enough for the electrons injected into the floating gate of the memory cells to be removed via the select gate. (b) A switchover operation is performed so that the first voltage is applied to the even-numbered select gates of each memory row and the second voltage is applied to the odd-numbered select gates of each memory row such that the electrons injected into the floating gates of the memory cells are pulled away via the select gates to turn the memory cells into an erased state.