The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 03, 2007

Filed:

Dec. 16, 2004
Applicants:

King Jien Chui, Singapore, SG;

Ganesh Samudra, Singapore, IN;

Yee Chia Yeo, Singapore, SG;

Jinping Liu, Singapore, CN;

Kheng Chok Tee, Christchurch, NZ;

Wee Hong Phua, Singapore, SG;

Lydia Wong, Singapore, SG;

Inventors:

King Jien Chui, Singapore, SG;

Ganesh Samudra, Singapore, IN;

Yee Chia Yeo, Singapore, SG;

Jinping Liu, Singapore, CN;

Kheng Chok Tee, Christchurch, NZ;

Wee Hong Phua, Singapore, SG;

Lydia Wong, Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of manufacturing a semiconductor device provides a semiconductor substrate with a gate and a number of source/drain regions on the semiconductor substrate. A layer containing a strain-inducing element is provided over the number of source/drain regions. The strain-inducing element is driven from the layer containing a strain-inducing element into the number of source/drain regions. A number of source/drains is formed in the number of source/drain regions.


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