The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 03, 2007
Filed:
Mar. 10, 2004
Applicant:
Yi Ding, Sunnyvale, CA (US);
Inventor:
Yi Ding, Sunnyvale, CA (US);
Assignee:
ProMOS Technologies, Inc., Hsin-Chu, TW;
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8239 (2006.01);
U.S. Cl.
CPC ...
Abstract
In a nonvolatile memory, the select gates (S) are formed from one conductive layer (e.g. polysilicon or polyside), and the wordlines () interconnecting the select gates are made from a different conductive layer (e.g. metal). The wordlines overlie an interlevel dielectric () formed over control gates (). The dielectric thickness can be controlled to reduce the capacitance between the wordlines and the control gates. In some embodiments, the floating gates () are fabricated in a self-aligned manner using an isotropic etch of the floating gate layer.