The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 03, 2007
Filed:
Nov. 14, 2005
Tomoyuki Ishii, Tokyo, JP;
Taro Osabe, Tokyo, JP;
Hideaki Kurata, Tokyo, JP;
Takeshi Sakata, Tokyo, JP;
Tomoyuki Ishii, Tokyo, JP;
Taro Osabe, Tokyo, JP;
Hideaki Kurata, Tokyo, JP;
Takeshi Sakata, Tokyo, JP;
Renesas Technology Corp., Tokyo, JP;
Abstract
Disclosed is a non-volatile semiconductor memory device that uses a inversion layer provided on a semiconductor substrate as a data line. The memory device can reduce variation of characteristics among memory cells and can reduce bit cost. A plurality of assist gates are formed in the upper part of a p-type well through a gate oxide film. In the upper part of an interlayer insulator that covers those assist gates are formed word lines that are used as control electrodes. The width of those word lines is, for example, 0.1 μm, and each word line is separated from its adjacent word lines by a side wall spacer that is a silicon oxide film having a thickness of about 20 nm.