The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 03, 2007
Filed:
Mar. 08, 2004
Norihisa Arai, Saitama, JP;
Takeshi Nakano, Kamakura, JP;
Koki Ueno, Yokohama, JP;
Akira Shimizu, Yokohama, JP;
Norihisa Arai, Saitama, JP;
Takeshi Nakano, Kamakura, JP;
Koki Ueno, Yokohama, JP;
Akira Shimizu, Yokohama, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
A trench isolation region is formed in a surface region of a semiconductor substrate to form a MOS type element region. A mask layer having an opening portion is formed on the semiconductor layer, the opening portion continuously ranging on the entire surface of the MOS type element region and on part of the trench isolation region provided around the MOS type element region. A first impurity ion is implanted into the entire surface via the mask layer to form a peak of the impurity profile is situated in the semiconductor layer under the bottom surface of the shallow trench isolation region. A second impurity ion is implanted into the entire surface via the mask layer to form a peak of the impurity profile is situated on the midway of the depth direction of the trench isolation region. Then, the first and second impurity ions are activated.