The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 26, 2007
Filed:
Jul. 12, 2002
Makoto Hatakenaka, Tokyo, JP;
Koji Nii, Tokyo, JP;
Atsuo Mangyo, Tokyo, JP;
Takeshi Fujino, Tokyo, JP;
Makoto Hatakenaka, Tokyo, JP;
Koji Nii, Tokyo, JP;
Atsuo Mangyo, Tokyo, JP;
Takeshi Fujino, Tokyo, JP;
Renesas Technology Corp., Chiyoda-Ku, Tokyo, JP;
Abstract
When to a memory cell arraya read/write operation is performed of the 7-bit data in which parity bits of 3 bits are added to data of 4 bits, an error correction is carried out in concern to each of the 7-bit data. The memory cell array is divided into memory unitstoeach of which has four bits which are arranged along a direction of a word line. On writing the 7-bit data in the memory cell array, bits of the 7-bit data that are different from one another are written as written bit data along the direction of the word line in the memory unitsto, respectively. In the 7-bit data, the written bit data has an interval of four bits. Error correcting circuits performs an error correction of the 7-bit data in each of the 7-bit data.