The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 19, 2007
Filed:
Nov. 12, 2004
Steven C. Avanzino, Cupertino, CA (US);
Nicholas H. Tripsas, San Jose, CA (US);
Jeffrey A. Shields, Sunnyvale, CA (US);
Fei Wang, San Jose, CA (US);
Richard P. Kingsborough, Acton, MA (US);
William Leonard, Brookline, MA (US);
Suzette K. Pangrle, Cupertino, CA (US);
Steven C. Avanzino, Cupertino, CA (US);
Nicholas H. Tripsas, San Jose, CA (US);
Jeffrey A. Shields, Sunnyvale, CA (US);
Fei Wang, San Jose, CA (US);
Richard P. Kingsborough, Acton, MA (US);
William Leonard, Brookline, MA (US);
Suzette K. Pangrle, Cupertino, CA (US);
Spansion LLC, Sunnyvale, CA (US);
Advanced Micro Devices, Inc., Austin, TX (US);
Abstract
Disclosed are methods for facilitating concurrent formation of copper vias and memory element structures. The methods involve forming vias over metal lines and forming copper plugs, wherein the copper plugs comprise memory element film forming copper plugs (memE copper plugs) and non-memory element forming copper plugs (non-memE copper plugs), forming a tantalum-containing cap over an upper surface of non-memE copper plugs, and depositing memory element films. The tantalum-containing cap prevents the formation of the memory element films in the non-memE copper plugs. The subject invention advantageously facilitates cost-effective manufacturing of semiconductor devices.