The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 12, 2007
Filed:
Dec. 08, 2003
Applicant:
Gilbert C. Vandling, Endicott, NY (US);
Inventor:
Gilbert C. Vandling, Endicott, NY (US);
Assignee:
Cadence Design Systems, Inc., San Jose, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract
Disclosed are novel methods and apparatus for transforming sequential logic designs into equivalent combinational logic. In an embodiment of the present invention, a design method for transforming sequential logic designs into equivalent combinational logic is disclosed. The design method includes: simulating each stage of a clocking sequence to produce simulation values; saving the simulation values; and performing a plurality of backward logic traces based on the saved simulation values to provide an equivalent combinational logic representation of a sequential logic design.