The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 12, 2007
Filed:
Nov. 24, 2004
Hao-yu Chen, Kaohsiung, TW;
Ju-wang Hsu, Taipei, TW;
Baw-ching Perng, Hsin-Chu, TW;
Fu-liang Yang, Hsin-Chu, TW;
Hao-Yu Chen, Kaohsiung, TW;
Ju-Wang Hsu, Taipei, TW;
Baw-Ching Perng, Hsin-Chu, TW;
Fu-Liang Yang, Hsin-Chu, TW;
Taiwan Semiconductor Manfacturing Company, Ltd., Hsin-Chu, TW;
Abstract
In a method of forming a double gate device, a buried insulating layer having a thickness of less than about 30 nm is formed on a first substrate. A second substrate is formed on the buried insulating layer. A pad layer is formed over the second substrate. A mask layer is formed over the pad layer. A first trench is formed extending through the pad layer, second substrate, buried insulating layer and into the first substrate. The first trench is filled with a first isolation. A second trench is formed in the first isolation and filled with a conductive material. An MOS transistor is formed on the second substrate. A bottom gate is formed under the buried insulating layer and self-aligned to the top gate formed on the second substrate.