The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 05, 2007
Filed:
Dec. 18, 2002
Alexander John Cochran, North Vancouver, CA;
Patrick Neil Bailey, Port Coquitlam, CA;
Larrie S. Carr, Anmore, CA;
Alexander John Cochran, North Vancouver, CA;
Patrick Neil Bailey, Port Coquitlam, CA;
Larrie S. Carr, Anmore, CA;
PMC-Sierra, Inc., Santa Clara, CA (US);
Abstract
A desired FIFO buffer fill level is continuously derived during mapping or demapping of plesiosynchronous data signals into synchronized data signals, or vice-versa. One of j predefined integer values Iis repetitively consecutively produced during each consecutive one of j FIFO buffer write clock cycles, where i=1, . . . , j and where j and the integer values Iare selected such that closely approximates the number of bits read from the FIFO buffer per FIFO buffer write clock cycle. During each kconsecutive FIFO buffer write clock cycle, a Bits_Read value I+Iis produced where k=1, . . . , p; a Bits_Written value is produced; a Gap_Pattern value is derived by subtracting the Bits_Read value from the Bits_Written value; and, the Gap_Pattern is added to a predefined value representative a FIFO buffer center fill level to produce the desired FIFO buffer fill level.