The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 05, 2007
Filed:
Aug. 11, 2005
Mondira Pant, Westborough, MA (US);
Paul Gronowski, Northborough, MA (US);
Randy Allmon, North Grafton, MA (US);
Manjunath Bhat, Sunnyvale, CA (US);
David Lin, Westborough, MA (US);
Mondira Pant, Westborough, MA (US);
Paul Gronowski, Northborough, MA (US);
Randy Allmon, North Grafton, MA (US);
Manjunath Bhat, Sunnyvale, CA (US);
David Lin, Westborough, MA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A circuit for converting received domino logic signals to a static output signal includes a pair of logic gates having inputs and outputs that are cross-coupled and responsive to a domino logic input signal and a clock signal to latch the input signal during an evaluation phase defined by the clock signal. A static output is based on the latched value. One of the logic gates is tri-stateable to establish a value at the static output during a scan mode. A circuit for converting received static logic signals into domino logic signals includes a latch responsive to a clock signal to latch the value of a data signal at a predefined clock transition. A conversion circuit produces a domino logic output signal in response to the clock signal and the latched value of the data signal. A latch component is tri-stateable to establish a value at the output.