The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 05, 2007
Filed:
Jul. 15, 2003
Noboru Matsuda, Kanagawa-ken, JP;
Hitoshi Kobayashi, Kanagawa-ken, JP;
Masaru Kawakatsu, Kanagawa-ken, JP;
Akihiko Osawa, Kanagawa-ken, JP;
Noboru Matsuda, Kanagawa-ken, JP;
Hitoshi Kobayashi, Kanagawa-ken, JP;
Masaru Kawakatsu, Kanagawa-ken, JP;
Akihiko Osawa, Kanagawa-ken, JP;
Kabushiki Kaisha Toshiba, Kawasaki-shi, JP;
Abstract
A semiconductor device, and particularly an MOS transistor device, wherein in order to increase a channel region density and to achieve a low resistance of a transistor device there is provided a first gate electrode group having a plurality of gate electrodes formed on a semiconductor substrate to be away from each other at first equal spacings, a second gate electrode group having a plurality of gate electrodes formed on the semiconductor substrate to be away from each other at the first equal spacings, a source contact portion formed away from the first or the second gate electrode group at a second spacing, and source regions for electrically interconnecting the first gate electrode group and the source contact. The source regions are connected to each other at one end of the first gate electrode group, and separated at the other end of the first gate electrode group. In addition, the gate electrodes of the first group are connected each other at the other end. The second spacing is greater than the first spacing.