The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 05, 2007
Filed:
Jun. 04, 2004
King Wai Kelwin Ko, San Jose, CA (US);
Hiroyuki Kinoshita, Sunnyvale, CA (US);
Hiroyuki Ogawa, San Jose, CA (US);
Yu Sun, Saratoga, CA (US);
King Wai Kelwin Ko, San Jose, CA (US);
Hiroyuki Kinoshita, Sunnyvale, CA (US);
Hiroyuki Ogawa, San Jose, CA (US);
Yu Sun, Saratoga, CA (US);
Spansion LLC, Sunnyvale, CA (US);
Abstract
A method and system for improving the topography of a memory array is disclosed. In one embodiment, a dummy bitline is formed over a field oxide region at an interface between a memory array and interface circuitry. In addition, a poly-2 layer is applied above the dummy bitline on the field oxide region wherein the utilization of the field oxide region for placement of the dummy bitline provides a uniform surface between an actual bitline and the periphery of the memory array. Furthermore, a landing pad is formed at the end of the dummy bitline on the field oxide region, wherein the dummy bitline does not cause erroneous operation of the landing pad.