The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 22, 2007

Filed:

Sep. 17, 2003
Applicants:

Charles E. Moore, Loveland, CO (US);

Xiaoyang Zhang, San Jose, CA (US);

Jeffrey R. Rearick, Fort Collins, CO (US);

Inventors:

Charles E. Moore, Loveland, CO (US);

Xiaoyang Zhang, San Jose, CA (US);

Jeffrey R. Rearick, Fort Collins, CO (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); H03K 5/153 (2006.01); H03K 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Disclosed is a Boundary-Scan test receiver for capturing signals during board interconnect testing. The test receiver has a comparator with a first input to receive signals during board interconnect testing, and a second input to receive a reference voltage. A programmable hysteresis circuit is coupled to at least one of the comparator's inputs. The programmable hysteresis circuit may be configured to program a hysteresis voltage and/or a hysteresis delay, both of which help prevent the comparator from integrating signal noise.


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