The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 22, 2007

Filed:

Oct. 21, 2002
Applicant:

Takashi Saiki, Kawasaki, JP;

Inventor:

Takashi Saiki, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/112 (2006.01);
U.S. Cl.
CPC ...
Abstract

A dose of arsenic for an extension region in an NMOS transistor is in a range from 5×10to 2×10ions/cmand preferably in a range from 1.1×10to 1.5×10ions/cm. Also, in addition to arsenic, a low concentration of phosphorus is doped into the extension region by ion implantation. Consequently, with a semiconductor device of the CMOS structure, it is possible to prevent unwanted creeping of silicide that occurs often in the shallow junction region depending on a concentration of an impurity having a low diffusion coefficient as represented by arsenic. Further, not only can the resistance in the shallow junction region be lowered, but also an amount of overlaps can be optimized in each transistor.


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