The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 22, 2007
Filed:
Dec. 17, 2004
Scott R. Summerfelt, Dallas, TX (US);
Lindsey H. Hall, Plano, TX (US);
Kezhakkedath R. Udayakumar, Dallas, TX (US);
Theodore S. Moise, Iv, Dallas, TX (US);
Scott R. Summerfelt, Dallas, TX (US);
Lindsey H. Hall, Plano, TX (US);
Kezhakkedath R. Udayakumar, Dallas, TX (US);
Theodore S. Moise, IV, Dallas, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
Methods () are provided for fabricating a ferroelectric capacitor structure including methods () for etching and cleaning patterned ferroelectric capacitor structures in a semiconductor device. The methods comprise etching () portions of an upper electrode, etching () ferroelectric material, and etching () a lower electrode to define a patterned ferroelectric capacitor structure, and etching () a portion of a lower electrode diffusion barrier structure. The methods further comprise ashing () the patterned ferroelectric capacitor structure using a first ashing process, performing () a wet clean process after the first ashing process, and ashing () the patterned ferroelectric capacitor structure using a second ashing process directly after the wet clean process at a high temperature in an oxidizing ambient.