The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7215589 B1

PDF
Full Text
Expired
Date of Patent:
May. 08, 2007

Filed:

Feb. 06, 2006
Applicants:

Chiaki Dono, Tokyo, JP;

Yasuji Koshikawa, Tokyo, JP;

Inventors:

Chiaki Dono, Tokyo, JP;

Yasuji Koshikawa, Tokyo, JP;

Assignee:

Elpida Memory, Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 8/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor memory device includes a refresh counter that outputs an address of a word line to be refreshed, a ROM circuit that stores a relevant address related to a refresh defective address, and a multiple refresh control circuit that simultaneously or continuously activates the refresh defective address and the relevant address within one refresh cycle in response to a fact that the ROM circuit detects the relevant address. The multiple refresh control circuit excludes a pattern having a risk that a power supply potential or a ground potential varies greatly such as a pattern that the multiple refresh occurs continuously. With this arrangement, a refresh defective cell can be saved while restricting the variation in the power supply potential or the ground potential.


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