The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 24, 2007

Filed:

Sep. 13, 2005
Applicants:

Hironobu Mori, Nagasaki, JP;

Hidenari Hachino, Nagasaki, JP;

Chieko Nakashima, Nagasaki, JP;

Tsutomu Sagara, Nagasaki, JP;

Nobumichi Okazaki, Kanagawa, JP;

Hajime Nagao, Nagasaki, JP;

Inventors:

Hironobu Mori, Nagasaki, JP;

Hidenari Hachino, Nagasaki, JP;

Chieko Nakashima, Nagasaki, JP;

Tsutomu Sagara, Nagasaki, JP;

Nobumichi Okazaki, Kanagawa, JP;

Hajime Nagao, Nagasaki, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A storage device is proposed, which includes: a source line arranged along a row direction; a bit line arranged along a column direction; a storage element arranged at an intersection of the source line and the bit line; a writing circuit connected to one terminal of the bit line and applying a predetermined voltage to the bit line; and a voltage adjusting circuit connected to a storage element that is located closest to another terminal of the bit line; wherein the voltage adjusting circuit compares the voltage applied to the storage element located closest to the another terminal of the bit line with a setting voltage to thereby adjust the voltage that the writing circuit applies to the bit line.


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