The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 10, 2007
Filed:
Nov. 22, 2002
Andrew W. Martwick, Folsom, CA (US);
Ken Drottar, Portland, OR (US);
David S. Dunning, Portland, OR (US);
Zale T. Schoenborn, Portland, OR (US);
Andrew M. Volk, Granite Bay, CA (US);
Ronald W. Swartz, Orangevale, CA (US);
Dennis J. Miller, Sherwood, OR (US);
Andrew W. Martwick, Folsom, CA (US);
Ken Drottar, Portland, OR (US);
David S. Dunning, Portland, OR (US);
Zale T. Schoenborn, Portland, OR (US);
Andrew M. Volk, Granite Bay, CA (US);
Ronald W. Swartz, Orangevale, CA (US);
Dennis J. Miller, Sherwood, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
An apparatus and method for low latency power management on a serial data link are described. In one embodiment, the method includes the detection of an electrical idle exit condition during receiver operation in an electrical idle state. Once detected, data synchronization is performed according to one or more received data synchronization training patterns. Finally, when the synchronization is performed within a determined synchronization re-establishment period, the receiver will resume operation according to a normal power state. Accordingly, the embodiment described illustrates an open loop, low latency power resumption operation for power management within 3GIO links.