The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 10, 2007

Filed:

Sep. 27, 2005
Applicants:

Oleg Dadashev, Hadera, IL;

Alexander Kushnarenko, Haifa, IL;

Inventors:

Oleg Dadashev, Hadera, IL;

Alexander Kushnarenko, Haifa, IL;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 3/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

A high voltage regulator including a current mirror including a pair of transistors, one of the transistors being connected to a node that outputs an output voltage V, a diode stack that includes a plurality of serially connected transistors T, T, T, . . . T, wherein the transistor Tis connected to a node n, to which is connected another transistor Tthat receives an input bias voltage V, and wherein a feedback voltage fb from node nis fed to an input of the differential amplifier, the differential amplifier receiving an input reference voltage Vat one of its other inputs, and is also connected to positive voltage supply Vdd, the differential amplifier outputting to an NMOS transistor M, and wherein the high voltage regulator has a large diode stack gain and lower G*G*m, resulting in a generally constant feedback (loop) gain G, wherein the loop gain is given by:Loop Gain=


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