The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 27, 2007
Filed:
Jul. 12, 2002
Deshanand P. Singh, Mississauga, CA;
Terry P. Borer, Toronto, CA;
Steven Caranci, Toronto, CA;
Tim Vanderhoek, Toronto, CA;
Ivan Hamer, Toronto, CA;
Jimmy Kuo, Mississauga, CA;
Przemek Guzy, Burington, CA;
Alexander Grbic, Toronto, CA;
Rebecca Katzin, Toronto, CA;
Stephen D. Brown, Toronto, CA;
Zvonko Vranesic, Etobicoke, CA;
Deshanand P. Singh, Mississauga, CA;
Terry P. Borer, Toronto, CA;
Steven Caranci, Toronto, CA;
Tim Vanderhoek, Toronto, CA;
Ivan Hamer, Toronto, CA;
Jimmy Kuo, Mississauga, CA;
Przemek Guzy, Burington, CA;
Alexander Grbic, Toronto, CA;
Rebecca Katzin, Toronto, CA;
Stephen D. Brown, Toronto, CA;
Zvonko Vranesic, Etobicoke, CA;
Altera Corporation, San Jose, CA (US);
Abstract
A method for positioning components of a system onto a target device utilizing programmable logic devices (PLDs) is disclosed. A first location on the target device for a first logic region having a first component is determined. Determined properties of the first logic region are preserved. The first logic region is integrated with a second logic region having a second component in view of the determined properties.