The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 27, 2007

Filed:

May. 11, 2005
Applicants:

Eiji Kamiya, Mie, JP;

Hirohisa Iizuka, Mie, JP;

Hiroaki Hazama, Mie, JP;

Kazuhito Narita, Mie, JP;

Norio Ohtani, Mie, JP;

Inventors:

Eiji Kamiya, Mie, JP;

Hirohisa Iizuka, Mie, JP;

Hiroaki Hazama, Mie, JP;

Kazuhito Narita, Mie, JP;

Norio Ohtani, Mie, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of fabricating a semiconductor device includes forming a resist pattern so that an opening between select gates of a select gate transistor is formed in a memory cell region, implanting threshold-adjusting ions under the select gate with the resist pattern serving as a mask and removing an oxide film, forming a nitride film and an interlayer insulation film after the resist pattern has been removed, forming a resist pattern used to form a contact hole between the select gates and a contact hole for a transistor to be formed in the peripheral circuit region, the transistor having a higher breakdown voltage than a memory cell transistor and etching the interlayer insulation film, the nitride film and the gate insulation film individually with the resist pattern serving as a mask.


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