The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 27, 2007
Filed:
Apr. 27, 2004
Wonju Cho, Daejeon, KR;
Seong Jae Lee, Daejeon, KR;
Jong Heon Yang, Daejeon, KR;
Jihun OH, Daejeon, KR;
Kiju Im, Daejeon, KR;
Chang Geun Anh, Daejeon, KR;
Wonju Cho, Daejeon, KR;
Seong Jae Lee, Daejeon, KR;
Jong Heon Yang, Daejeon, KR;
Jihun Oh, Daejeon, KR;
Kiju Im, Daejeon, KR;
Chang Geun Anh, Daejeon, KR;
Abstract
Provided is a MOSFET with an ultra short channel length and a method of fabricating the same. The ultra short channel MOSFET has a silicon wire channel region with a three-dimensional structure, and a source/drain junction formed in a silicon conductive layer formed of both sides of the silicon wire channel region. Also, a gate electrode formed on the upper surface of the silicon wire channel region by interposing a gate insulating layer having a high dielectric constant therebetween, and source and drain electrodes connected to the source/drain junction are included. The silicon wire channel region is formed with a triangular or trapezoidal section by taking advantage of different etch rates that depend on the planar orientation of the silicon. The source/drain junction is formed by a solid-state diffusion method.