The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 27, 2007
Filed:
Jun. 21, 2003
Changfeng Xia, Plano, TX (US);
Trace Q. Hurd, Plano, TX (US);
Changfeng Xia, Plano, TX (US);
Trace Q. Hurd, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
The present invention provides a system () for remediating aberrations along the perimeter of a semiconductor wafer (). The system includes a cleaning apparatus () within which the wafer is spun within a confined area. A chuck () defines the confined area, having a sidewall that extends above the upper surface () of the wafer and surrounds the perimeter of the wafer. The chuck also has a bottom wall, with an aperture formed therein, beneath the wafer. The system includes an isolation barrier (), disposed atop the bottom wall of the chuck and around the aperture, in proximity to the lower surface so of the wafer. This forms a narrow gap () between the barrier and the wafer. A pressurized source forcefully directs a gas () at and along the lower surface of the wafer. The system also includes a remediation solution () that is applied to the upper surface of the wafer. The solution is forced into a well () formed between the chuck sidewall and the perimeter of the wafer, such that the solution bathes the perimeter of the wafer.