The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2007
Filed:
May. 25, 2005
Tadahiro Obara, Ome, JP;
Masatoshi Hasegawa, Hamura, JP;
Yousuke Tanaka, Ome, JP;
Tomofumi Hokari, Akishima, JP;
Kenichi Tajima, Akishima, JP;
Tadahiro Obara, Ome, JP;
Masatoshi Hasegawa, Hamura, JP;
Yousuke Tanaka, Ome, JP;
Tomofumi Hokari, Akishima, JP;
Kenichi Tajima, Akishima, JP;
Hitachi, Ltd., Tokyo, JP;
Hitachi ULSI Systems Co., Ltd., Tokyo, JP;
Abstract
A DRAM whose operation is sped up and power consumption is reduced is provided. A pair of precharge MOSFETs for supplying a precharge voltage to a pair of input/output nodes of a CMOS sense amplifier is provided; the pair of input/output nodes are connected to a complementary bit-line pair via a selection switch MOSFET; a first equalize MOSFET is provided between the complementary bit-line pair for equalizing them; a memory cell is provided between one of the complementary bit-line pair and a word line intersecting with it; gate insulators of the selection switch MOSFETs and first equalize MOSFET are formed by first film thickness; a gate insulator of the precharge MOSFET is formed by second film thickness thinner than the first film thickness; a precharge signal corresponding to a power supply voltage is supplied to the precharge MOSFET; and an equalize signal and a selection signal corresponding to a boost voltage are supplied to the first equalize MOSFET and the selection switch MOSFET, respectively.