The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 06, 2007
Filed:
Nov. 10, 2003
Henry S. Chao, Cupertino, CA (US);
Ervin T. Hill, Los Lunas, NM (US);
Henry S. Chao, Cupertino, CA (US);
Ervin T. Hill, Los Lunas, NM (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A method of forming high performance logic transistors and high density flash transistors on a single substrate is disclosed. In one embodiment, the method comprises: forming a logic gate stack in a logic region on a substrate, forming a flash memory gate stack in a flash region on the substrate, depositing a hardmask layer over the logic gate stack and over the flash memory gate stack, patterning the hardmask in the logic region so that areas of hardmask remain where logic gates are desired, patterning the flash gate stack in the flash region to form flash memory gates, and etching the logic gate stack using the remaining hardmask as a mask to form logic gates.