The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 27, 2007
Filed:
Aug. 18, 2003
Mark Kleshock, Phoenix, AZ (US);
Jacques Faguet, Gilbert, AZ (US);
Tim Provencher, Gilbert, AZ (US);
Mark Kleshock, Phoenix, AZ (US);
Jacques Faguet, Gilbert, AZ (US);
Tim Provencher, Gilbert, AZ (US);
Tokyo Electron Limited, Tokyo, JP;
Abstract
Particle flaking is reduced in a semiconductor wafer processing apparatus by installing a chamber shield assembly in the chamber of the apparatus. The shield assembly includes a plurality of nested shields that are supported out of contact with each other and suspended such that, during thermal expansion and contraction, gaps are maintained that are sufficient to avoid arcing. Alignment structure on the shields and on the chamber walls force the shields to align concentrically and maintain the gaps. The shields are made of aluminum or another thermally conductive material and have cross-sectional areas large enough to provide high thermal conductivity throughout the shields. Mounting flanges and other mounting surfaces are provided on the shields that form intimate thermal contact with sufficient contacting area to insure high thermal conductivity from the shields to the temperature controlled walls of the chamber. Radiant lamps of an array are spaced around the chamber and extend vertically to expose multiple shields across large areas to heat for pre-heating bake-out of the shields and to eliminate thermal shock upon processing the first wafer of a run.