The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 20, 2007
Filed:
Dec. 14, 2004
Julian Partridge, Austin, TX (US);
James W. Cady, Austin, TX (US);
James Wilder, Austin, TX (US);
David L. Roper, Austin, TX (US);
James Douglas Wehrly, Jr., Austin, TX (US);
Julian Partridge, Austin, TX (US);
James W. Cady, Austin, TX (US);
James Wilder, Austin, TX (US);
David L. Roper, Austin, TX (US);
James Douglas Wehrly, Jr., Austin, TX (US);
Staktek Group L. P., Austin, TX (US);
Abstract
The present invention provides a system and method that mounts integrated circuit devices onto substrates and a system and method for employing the method in stacked modules. The contact pads of a packaged integrated circuit device are substantially exposed. A solder paste that includes higher temperature solder paste alloy is applied to a substrate or to the integrated circuit device to be mounted. The integrated circuit device is positioned to contact the contacts of the substrate. Heat is applied to create high temperature joints between the contacts of the substrate and the integrated circuit device resulting in a device-substrate assembly with high temperature joints. The formed joints are less subject to re-melting in subsequent processing steps. The method may be employed in devising stacked module constructions such as those disclosed herein as preferred embodiments in accordance with the invention. Typically, the created joints are low in profile.