The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2007

Filed:

Jun. 13, 2005
Applicants:

Jeagun Park, Sungnam, KR;

Kenji Tomizawa, Noda, JP;

Gonsub Lee, Seoul, KR;

Eiji Kamiyama, Noda, JP;

Inventors:

Jeagun Park, Sungnam, KR;

Kenji Tomizawa, Noda, JP;

Gonsub Lee, Seoul, KR;

Eiji Kamiyama, Noda, JP;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/01 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor structure and a method of manufacturing a silicon on insulator (SOI) structure having a silicon germanium (SiGe) layer interposed between the silicon and the insulator. According to one manufacturing method, a first SiGe layer, a silicon layer, and a second SiGe layer are epitaxially grown in sequence over a first substrate, and then an insulating layer is formed on the second SiGe layer. Then, impurity ions are implanted into a predetermined location of the first substrate underlying the first SiGe layer to form an impurity implantation region. A second substrate is bonded to the insulating layer on the first substrate. After the first substrate is separated along the impurity implantation region and removed, the first SiGe layer remaining on the surface of the separated region is removed so that the surface of the silicon layer may be exposed.


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