The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2007

Filed:

Mar. 26, 2003
Applicants:

Toru Imori, Kitaibaraki, JP;

Junnosuke Sekiguchi, Kitaibaraki, JP;

Atsushi Yabe, Kitaibaraki, JP;

Inventors:

Toru Imori, Kitaibaraki, JP;

Junnosuke Sekiguchi, Kitaibaraki, JP;

Atsushi Yabe, Kitaibaraki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

It is an object of the present invention to provide a semiconductor wafer on which a thin, smooth, uniform and good adhesive electroless plating layer that can be suitable for a seed layer is formed, and to provide an electroless plating method which is suitable for use in the manufacture of such a semiconductor wafer. A semiconductor wafer is coated with a silane coupling agent which has a functional group that is able to capture a metal, and is further coated with an organic-solvent solution of a palladium compound such as palladium chloride or the like. Afterward, the wafer is electroless plated. As a result of such an electroless plating method, a semiconductor wafer having a thickness of 70 to 5000 angstroms and a mean surface roughness Ra of 10 to 100 angstroms can be obtained.


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