The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2007

Filed:

May. 06, 2004
Applicants:

Shu Chen Huang, Hsin-Chu, TW;

Gwo-chiang Fang, Pingihen, TW;

Inventors:

Shu Chen Huang, Hsin-Chu, TW;

Gwo-Chiang Fang, Pingihen, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 31/26 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and program is disclosed for generating work in progress (WIP) schedules in semiconductor manufacturing facility. After determining starting and ending dates of predetermined schedule periods for generating WIP schedules, remaining days are determined for completing at least one wafer lot associated with predetermined product from the starting date. A starting process stage for the wafer lot is determined at the starting date based on the remaining days, and an ending process stage for the wafer lot at the end of the ending date. Wafer numbers are assigned to each process stage of schedule times in proportion to process times of each stage in view of total process time for the schedule period, and by repeating the above steps for one or more other wafer lots under production, a total wafer number assigned to each stage is determined and the WIP schedule for the schedule period is obtained.


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