The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 13, 2007
Filed:
Oct. 29, 2004
Applicant:
Shiao-shien Chen, Hsin-Chu, TW;
Inventor:
Shiao-Shien Chen, Hsin-Chu, TW;
Assignee:
United Microelectronics Corp., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); H01L 29/94 (2006.01); H01L 31/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A semiconductor device with substrate-triggered ESD protection has a guard ring, a first MOS transistor array, a second MOS transistor array, a substrate-triggered portion, and an N-well. The first MOS transistor array, the second MOS transistor array, the substrate-triggered portion, and the N-well are formed in a region surrounded by the guard ring, and the substrate-triggered portion is located between the first MOS transistor array and the second MOS transistor array. When the ESD event occurs, the N-well is biased for directing a trigger current.