The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 06, 2007
Filed:
Nov. 10, 2005
Masanori Itou, Takatuki, JP;
Kiyohito Mukai, Souraku-gun, JP;
Masanori Itou, Takatuki, JP;
Kiyohito Mukai, Souraku-gun, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
To provide a layout verification method capable of accurately detecting damage to be given to a gate, and to provide a higher-workability and higher-reliability design method to accurately detect damage to be given to a gate and to determine an approach for design correction to avoid damage, the layout verification method according to the invention is characterized in that an antenna value which is an estimated value of transistor gate damage is output based on an antenna ratio, and a fluctuation of plasma charging damage due to the layout near the transistor gate.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile