The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 06, 2007
Filed:
Oct. 18, 2005
John M. Callahan, San Ramon, CA (US);
Hemanshu T. Vernenker, Santa Clara, CA (US);
Michael D. Fliesler, Santa Cruz, CA (US);
Glen Arnold Rosendale, Palo Alto, CA (US);
Harry Shengwen Luan, Saratoga, CA (US);
Zhongshang Liu, Plano, TX (US);
John M. Callahan, San Ramon, CA (US);
Hemanshu T. Vernenker, Santa Clara, CA (US);
Michael D. Fliesler, Santa Cruz, CA (US);
Glen Arnold Rosendale, Palo Alto, CA (US);
Harry Shengwen Luan, Saratoga, CA (US);
Zhongshang Liu, Plano, TX (US);
Kilopass Technology, Inc., Sunnyvale, CA (US);
Abstract
A programmable memory cell formed useful in a memory array having column bitlines and row wordlines. The memory cell including a breakdown transistor having its gate connected to a program wordline and a write transistor connected in series at a sense node to said breakdown transistor. The gate of the write transistor is connected to a write wordline. Further, a first sense transistor has its gate connected to the sense node. A second sense transistor is connected in series to the first sense transistor and has its gate connected to a read wordline. The second sense transistor has its source connected to a column bitline.